1. Field of the Invention
The embodiments of the invention generally relate to memory arrays incorporating memory cells with programmable memory elements, and, more particularly, to such a memory array with balanced and, optionally, bi-directional bit line paths.
2. Description of the Related Art
Electrical impulses applied to phase change materials can “tune” or “program” them such that they exhibit a desired resistive property to store data. For example, the material can be programmed to store one binary state (e.g., “0”) at a low resistance state and another binary state (e.g., “1”) at a high resistance state. Additionally, such phase change materials can be programmed to multiple different resistance states (e.g., a high resistance completely amorphous state, multiple mid-resistance semi-amorphous/semi-crystalline states, and a low resistance completely crystalline state) in order to store more than just a single bit (0,1) of information.
The state of a phase change material can be switched through a heating and cooling process which is controlled electrically by passing current through the phase change element and the ohmic heating that occurs. To transform the cell from a high resistance amorphous state to a lower resistance state (i.e., to SET the material), a current pulse is sent through the programmable resistor, heating the phase change material above a predetermined temperature (i.e., above its crystallization temperature) for a given period of time to completely or partially crystallize the material. To transform the cell from a semi-amorphous/semi-crystalline or completely crystalline state to a completely amorphous state (i.e., to RESET the material), a high current pulse is applied to the cell, causing the phase change material to melt. During a subsequent quench cooling, the phase change material is amorphized.
Data that is stored in the programmable resistor can be read without destructing the programmed state of the phase change material. Specifically, a predetermined voltage that is less than the voltage required to achieve the crystallization temperature can be applied to a memory cell and, using a sense amplifier, the magnitude of the readout current through the cell can be detected and analyzed to determine the resistance state of the cell and, thereby, the binary state of the stored data in the cell.
A key to phase change memory technology is determining how to design large scale memory systems which allow random access of millions of bits. This has been accomplished through a system with an array of memory cells, each of which contains a programmable resistor (i.e., a phase change element) that is gated by an access transistor. The current passing through each memory cell and, more particularly, through each programmable resistor, is controlled via a matrix of word lines coupled to each access transistor gate and bit lines coupled to a terminal of each phase change element. Thus, for example, in order to write, set or reset each phase change element, a predetermined voltage is applied to the access transistor gates via the word lines, thereby allowing a current pulse to flow through the bit lines into the phase change elements (See Bedeschi et al., “4 Mb MOSFET-selected phase change memory experimental chip”, ESSCIRC 2004). However, one problem associated with such a memory array configuration is that cell current and, hence, power is initially lower than intended. This lower initial power causes the initial heating rate of the memory cells to lag. Another problem is that the total energy that is deposited into each phase change element varies depending upon the location of the phase change element in the array. This location dependent energy can introduce additional fluctuations and a broader cell distribution. Therefore, there is a need in the art for an improved large scale memory system that allows random access of millions of bits through an array of memory cells, each of which contains a programmable resistor.